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Placement
Papers >>
Hardware Questions
>>
VLSI and Hardware
Engineering Design Questions
- Explain why
& how a MOSFET works
- Draw Vds-Ids
curve for a MOSFET. Now, show how this curve changes (a)
with increasing Vgs (b) with increasing transistor width
(c) considering Channel Length Modulation
- Explain the
various MOSFET Capacitances & their significance
- Draw a CMOS
Inverter. Explain its transfer characteristics
- Explain
sizing of the inverter
- How do you
size NMOS and PMOS transistors to increase the threshold
voltage?
- What is
Noise Margin? Explain the procedure to determine Noise
Margin
- Give the
expression for CMOS switching power dissipation
- What is
Body Effect?
- Describe
the various effects of scaling
- Give the
expression for calculating Delay in CMOS circuit
- What
happens to delay if you increase load capacitance?
- What
happens to delay if we include a resistance at the output
of a CMOS circuit?
- What are
the limitations in increasing the power supply to reduce
delay?
- How does
Resistance of the metal lines vary with increasing
thickness and increasing length?
- You have
three adjacent parallel metal lines. Two out of phase
signals pass through the outer two metal lines. Draw the
waveforms in the center metal line due to interference.
Now, draw the signals if the signals in outer metal lines
are in phase with each other
- What
happens if we increase the number of contacts or via from
one metal layer to the next?
- Draw a
transistor level two input NAND gate. Explain its sizing
(a) considering Vth (b) for equal rise and fall times
- Let A & B
be two inputs of the NAND gate. Say signal A arrives at the
NAND gate later than signal B. To optimize delay, of the
two series NMOS inputs A & B, which one would you place
near the output?
- Draw the
stick diagram of a NOR gate. Optimize it
- For CMOS
logic, give the various techniques you know to minimize
power consumption
- What is
Charge Sharing? Explain the Charge Sharing problem while
sampling data from a Bus
- Why do we
gradually increase the size of inverters in buffer design?
Why not give the output of a circuit to one large inverter?
- In the
design of a large inverter, why do we prefer to connect
small transistors in parallel (thus increasing effective
width) rather than lay out one transistor with large width?
- Given a
layout, draw its transistor level circuit. (I was given a 3
input AND gate and a 2 input Multiplexer. You can expect
any simple 2 or 3 input gates)
- Give the
logic expression for an AOI gate. Draw its transistor level
equivalent. Draw its stick diagram
- Why don’t
we use just one NMOS or PMOS transistor as a transmission
gate?
- For a NMOS
transistor acting as a pass transistor, say the gate is
connected to VDD, give the output for a square pulse input
going from 0 to VDD
- Draw a 6-T
SRAM Cell and explain the Read and Write operations
- Draw the
Differential Sense Amplifier and explain its working. Any
idea how to size this circuit? (Consider Channel Length
Modulation)
- What
happens if we use an Inverter instead of the Differential
Sense Amplifier?
- Draw the
SRAM Write Circuitry
-
Approximately, what were the sizes of your transistors in
the SRAM cell? How did you arrive at those sizes?
- How does
the size of PMOS Pull Up transistors (for bit & bit- lines)
affect SRAM’s performance?
- What’s the
critical path in a SRAM?
- Draw the
timing diagram for a SRAM Read. What happens if we delay
the enabling of Clock signal?
- Give a big
picture of the entire SRAM Layout showing your placements
of SRAM Cells, Row Decoders, Column Decoders, Read Circuit,
Write Circuit and Buffers
- In a SRAM
layout, which metal layers would you prefer for Word Lines
and Bit Lines? Why?
- How can you
model a SRAM at RTL Level?
- What’s the
difference between Testing & Verification?
- For an
AND-OR implementation of a two input Mux, how do you test
for Stuck-At-0 and Stuck-At-1 faults at the internal nodes?
(You can expect a circuit with some redundant logic)
- What is
Latch Up? Explain Latch Up with cross section of a CMOS
Inverter. How do you avoid Latch Up? </>
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